Power semiconductor devices using wide-bandgap semiconductor such as silicon carbide (SiC), gallium nitride (GaN), and diamond (C) have lower on-resistance than those of conventional semiconductor devices using silicon (Si) and gallium arsenide (GaAs), and can perform high-voltage and high-current operations at a high semiconductor junction temperature (Tj). Accordingly, reduction of the area of the semiconductor device and drastic simplification of a cooler is achieved at the same time, and it is expected that a small, light-weight, low-cost power electronic system can be achieved.
A bonding portion (so-called die bond using solder) with an electrically-conductive substrate in such a power semiconductor device requires high heat resistance as a matter of course. In view of this, AuGe eutectic solder (melting point 356° C.), AuSi eutectic solder (melting point 363° C.), ZnAl eutectic solder (melting point 380° C.), and the like which have high melting points are considered to be used as solder materials in such a power semiconductor device (Non-patent Literatures 1 to 3 and Patent Literature 1).
However, when the bonding portion of the semiconductor device is formed by using the high-temperature solder materials described above, voids tend to be formed in a high-temperature solder layer as clearly shown in FIG. 6 of Non-patent Literature 1 and FIG. 8a of Non-Patent Literature 2, and reduction of these voids is a major development problem (first prior art).
A known method for suppressing formation of voids in the die bond solder is a method in which a metal weight is placed on the semiconductor device and the semiconductor device is heated in this state to reflow the solder. FIG. 22 of Non-patent Literature 3 can be given as a specific example of the most sophisticated solder jig (second prior art).